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Design physical layouts for mixed-signal circuits like PLLs and high-speed I/O in advanced CMOS technologies using Cadence Virtuoso, collaborating with ASIC engineers on floor planning, custom layout, and design rule verification. Requires a BS in electrical engineering and 5+ years of mask layout experience, with deep expertise in analog circuit layout, DRC/LVS verification tools such as Calibre or Dracula, and scripting languages like Python or Perl. Hybrid role.

Written from this posting by Neural Jobs AI. The full description is below.

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Job Description

We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed mixed-signal circuit designs.

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.

What you'll be doing:

  • Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.

  • You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

  • Job duties will include floor planning, custom layout and verifying against design rules and schematics.

What we need to see:

  • BSEE or equivalent experience

  • Minimum of 5+ years of relevant mask design / layout experience

  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies; You are an expert with Cadence custom circuit design tools - particularly virtuoso.

  • Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, Primeyield

  • You are able to communicate in spoken and written English. Work effectively in a team, good communication skills, enthusiasm and positive energy.

  • Proficiency in scripting languages like perl, python, skill, etc. ;

  • Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS decks.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

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NVIDIA
Hardware & Semiconductors · 200-500 Members · Santa Clara, CA, United States

NVIDIA builds the GPUs and the CUDA software stack that most modern AI is trained and served on, along with its own research in graphics, robotics and foundation models.

All jobs at NVIDIA

Eligibility

Taiwan

Right to work in Taiwan required.

Workplace

On-site

Job Overview
Job Posted:
2 days ago
Job Type
Full Time
Education
Any
Experience
5-7 years

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