Senior Design Researcher
Design high-speed Serdes circuits reaching 80Gbps and beyond, owning the full lifecycle from architecture through silicon characterization in deep-submicron CMOS and FinFET processes. You'll need an MS in Electrical Engineering or equivalent experience, minimum five years in analog circuit design, and expertise with Cadence Virtuoso and simulation tools like Spectre or HSpice. The role involves transistor-level optimization, noise and stability analysis, collaboration with layout teams, and post-silicon debugging.
Written from this posting by Neural Jobs AI. The full description is below.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
Are you ready to take innovation further? At NVIDIA, we don’t just follow the industry; we define the next generation of connectivity. We seek a visionary Analog/Mixed-Signal Engineer to build and implement high-speed Serdes reaching 80Gbps and beyond. If you enjoy working with deep-submicron CMOS and excel in FinFET technology’s complexities, and want to see your work evolve from a blank schematic to high-performance silicon, this is your opportunity. Join us and be part of a company transforming computer graphics, PC gaming, and accelerated computing!
What you'll be doing:
Architect the Future: Take full ownership of high-speed Serdes architectures and transistor-level builds, pushing data rates to 80Gbps and higher.
Silicon Ownership: Drive the entire lifecycle—from initial concept and schematic entry to layout, verification, and final silicon characterization.
Master the Physics: Optimize complex circuits for peak system performance, balancing noise, power, and loop stability in deep-submicron nodes.
Collaborative Precision: Partner closely with layout engineers to provide strategic floorplanning and high-speed routing mentorship that ensures design integrity.
Solve the Impossible: Lead post-silicon bring-up and debugging efforts, translating real-world data into build refinements.
What we need to see:
MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience in the industry.
Minimum 5 plus years of professional Analog Build experience, with a deep portfolio in FinFET and deep-submicron CMOS processes.
The Toolkit: Proficiency in the Cadence Virtuoso environment and a "black belt" in simulation tools (Spectre, HSpice, FineSim, or XA).
Analytical Rigor: Expertise in noise analysis, Monte Carlo simulations, and complex loop stability. Rich experience in high-speed data and/or clock path design.
Modeling Mastery: Proven ability in the modeling, timing, and functionality of both analog and digital circuits to streamline top-level verification.
The X-Factor: You go beyond working in a silo. You are a collaborative teammate who communicates clearly and solves problems with a "find a way" mentality.
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NVIDIA builds the GPUs and the CUDA software stack that most modern AI is trained and served on, along with its own research in graphics, robotics and foundation models.
Taiwan
Right to work in Taiwan required.On-site
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