Senior Research Scientist, Superconducting Digital Electronics, Quantum AI

• Design and simulate superconductor digital logic circuits (such as single flux quantum (SFQ) logic, adiabatic quantum flux parametron (AQFP) logic, and other emerging superconductor logic families) for generating waveforms tailored to qubit control and readout.
• Develop superconductor digital logic systems enabling multiplexed qubit control and readout.
• Address issues in the integration of superconductor digital electronics such as multi-layer cell design, full-chip clock synchronization, flux trapping, and signal integrity.
• Collaborate with teams focused on design, fabrication, and measurement to validate fully integrated quantum processors.
  
• Publish research papers and present at leading scientific conferences to advance and enhance publicity.

Minimum qualifications:

• Master's degree in Electrical Engineering, Physics, related engineering discipline, or equivalent practical experience.
  
• Experience in superconductor logic families (e.g., RSFQ, ERSFQ, RQL, HFQ, AQFP).
• Experience performing tape-out of a superconducting IC chip.
• One or more published research paper or presentation at a relevant scientific conference.

Preferred qualifications:

• PhD in physics, electrical engineering, or a related engineering discipline.
• 7 years of research/industry experience in the design and simulation of superconductor digital logic circuits with 3 years of experience leading an Research and Development (R&D) group towards tape-out and demonstration of superconducting IC chips.
• Experience with full digital design flow including RTL, synthesis, verification, timing closure, place-and-route, and post-fabrication validation.
• Experience with low-temperature measurements of superconductor digital logic circuits.
• Experience with superconducting qubits.
• Proficiency with computer-aided design tools and electromagnetic simulation tools.

• Master's degree in Electrical Engineering, Physics, related engineering discipline, or equivalent practical experience.
  
• Experience in superconductor logic families (e.g., RSFQ, ERSFQ, RQL, HFQ, AQFP).
• Experience performing tape-out of a superconducting IC chip.
• One or more published research paper or presentation at a relevant scientific conference.