ASIC Power Manager, ML Accelerators

• Manage a power design team responsible for power architecture, power optimization and system power integration.
• Lead an experienced team, define the processes, methods and tools to continuously improve the power efficiency of the TPU designs.
• Contribute to design power modeling and drive convergence to power targets.
• Investigate, specify, and deploy architectural and microarchitectural power optimization techniques, defining best practices and methodologies to achieve low-power RTL designs.
• Collaborate with cross-functional software and system teams to create novel power management architectures to meet power goals.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 10 years of experience with ASIC or SoC design.
• Experience with power design, power modeling, power architecture, or power reduction methodologies/techniques.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• 5 years of experience managing mid-sized ASIC/SOC design teams with focus on power design and optimization.
• Experience defining and implementing chip-wide power management architectures and designs.
• Experience in power modeling, measurement, and correlation across the pre- and post-silicon phases.
• Understanding of modern power and thermal management techniques at both the silicon and system levels (including Dynamic Voltage and Frequency Scaling (DVFS), Turboing, Thermal Management, and System-Level Tradeoffs).
• Ability to solve open-ended power and performance problems under ambiguity.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 10 years of experience with ASIC or SoC design.
• Experience with power design, power modeling, power architecture, or power reduction methodologies/techniques.