Emulation Verification Tech Lead, Google Cloud

• Lead, plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
• Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
• Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
• Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
• Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.

Minimum qualifications:

• Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
• 10 years of Experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug)
• Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
• Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
• Experience with design debug tools (e.g., Verdi, Verisium).
• Experience with coding and scripting in C, C++, Perl, TCL, or Python.

Preferred qualifications:

• Experience with associated EDA tools, automation, and flow enhancements.
• Experience with coding in Verilog/SystemVerilog (for design).
• Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
• Understanding of RTL to emulation/FPGA flows including emulation test benches (e.g., transactors/accelerated VIPs, hybrid, in-circuit emulation).
• Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).

• Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
• 10 years of Experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug)
• Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
• Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
• Experience with design debug tools (e.g., Verdi, Verisium).
• Experience with coding and scripting in C, C++, Perl, TCL, or Python.