Hardware Engineer Jobs in San Jose, USA

Looking for a hardware engineer job in San Jose? Choose from 24 open roles at 4 employers. Explore real salary data and skills breakdown across remote, hybrid and on-site roles.

24 Open roles
4 Companies hiring
โ€” Average salary

Companies hiring Hardware engineers in San Jose

What do Hardware engineers in San Jose work on?

The roles on this page span several distinct hardware disciplines. Physical design engineers own backend flows from RTL to GDSII, working on advanced nodes at 7 nm or below and using tools such as Synopsys ICC2 and Cadence Innovus; specialisations include static timing analysis, power integrity, and EMIR. Verification engineers build UVM-based environments for high-speed SerDes and PHY IP, closing coverage across analogโ€“digital boundaries using SystemVerilog. RTL design engineers at SambaNova own microarchitecture and implementation for major blocks of an AI accelerator, driving frequency targets through datapath pipelining and managing powerโ€“performance trade-offs through tape-out. A separate systems architecture track covers rack-scale platforms, including board layout, chassis integration, interconnect fabric, power delivery, and cooling for AI server deployments. A firmware engineering lead role and an embedded software position targeting Ethernet retimers round out the more software-adjacent end of the spectrum. Most postings sit at principal or lead level, and several carry explicit cross-functional mentoring expectations.

Skills and experience employers ask for

The skills data covers mentions in descriptions across these postings, not stated requirements, and the sample is small enough that counts shift meaningfully with a single posting. Python appears most frequently, which likely reflects scripting and automation tasks rather than primary design work. Master's degree and PhD mentions are high, though the Senior Hardware Design Engineer summary from SambaNova explicitly lists a bachelor's path as an alternative. C++ and GPU mentions are present but relatively sparse.

Python 79%
Master's degree 71%
Agents 46%
PhD 46%
GPUs 42%
C\+\+ 25%
Evaluation 13%
APIs 13%
LLMs 4%
RAG 4%
Docker 4%
AWS 4%
Airflow 4%
Computer vision 4%

San Jose office, hybrid or remote?

Every posting on this page is listed as on-site; none are marked hybrid or remote, and there are no unknowns in the work-mode data. Candidates should assume in-person attendance is expected for all roles. The two employers, Astera Labs and SambaNova, are both headquartered in the San Jose area, so proximity to those offices would be relevant to consider. Neither posting in the sample summaries states anything about relocation assistance, so that should be confirmed directly with each employer.

Make your application specific to the work

  1. Map your tape-out history to the specific node and tool chain each posting names โ€” postings distinguish 7 nm-and-below physical design from earlier nodes, and tool familiarity with ICC2 or Innovus is called out explicitly.
  2. Prepare concrete examples of your role in a full chip or IP block lifecycle, from specification or RTL hand-off through silicon bring-up, since most postings are at principal or lead level and expect ownership rather than task execution.
  3. Review the domain specialisation each role targets โ€” SerDes and PHY verification, STA, EMIR and power integrity, and rack-scale thermal and power delivery are treated as separate tracks, so tailor your application to the one that matches your depth.
  4. Check each employer's careers page for the current application status of these specific postings, as no salary ranges are advertised here and role details including closing dates would need to be confirmed directly.

Questions about Hardware Engineer jobs in San Jose

No. Every posting on this page is listed as on-site. Neither hybrid nor remote arrangements appear in the work-mode data for any of these roles.

None of the postings on this page advertise a pay range. You would need to ask each employer directly or consult other sources, as this page has no salary data to draw on.

Advanced degrees are mentioned frequently in role descriptions, but at least one posting โ€” the Senior Hardware Design Engineer role at SambaNova โ€” explicitly states that a bachelor's degree combined with sufficient years of experience is an accepted alternative. Eligibility details vary by posting and should be checked individually.

The two employers represented are Astera Labs and SambaNova, both present with multiple postings. No other employers appear in this set.

Most postings are at lead or principal level. A smaller number are at senior individual-contributor or director level, and one sits at VP or executive level. A couple of postings do not state seniority explicitly.

Jobs checked 3 hours ago. ยท Guide reviewed 14 September 2026.