Senior Performance Co-Design Engineer, Google Cloud TPU

• Conduct comprehensive serving performance studies on current and emerging first-party and third-party LLMs.
• Develop and maintain advanced simulation, profiling, and modeling tools to identify bottlenecks, understand key characteristics, and project serving workload performance.
• Partner with model researchers, software teams, and hardware teams to co-design architectural improvements tailored to Large Language Model (LLM) inference latency and throughput.
• Drive data-backed decisions that influence the roadmap for future TPU and Cloud Silicon architectures.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in performance modeling/engineering, computer architecture, codesign, or systems engineering.
• Experience programming in C++ or Python.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience with hardware/software co-design problems, especially performance analysis and identification at the pre-silicon stage.
• Experience enabling and optimizing ML models (e.g., LLMs, large embedding models).
• Experience with ML infrastructure, profiling tools, or deep learning inference/serving optimizations.
• Familiarity with accelerator architectures.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in performance modeling/engineering, computer architecture, codesign, or systems engineering.
• Experience programming in C++ or Python.