Silicon Engineering Manager, EMIR and Power Grid, AI/ML

• Direct, manage, and set strategy for the power grid distribution and power integrity team, accurately identifying required skills and allocating resources across all active projects.
• Manage the evaluates electromigration (EM) and voltage drops (IR drop) (EMIR) team to complete analysis at the block, sub-chip, and full-chip levels, successfully executing comprehensive signoff checks to ensure highly robust final design reliability.
• Collaborate closely with physical design, STA, package, and circuit teams to define EMIR budgets, signoff methodologies, and proactive mitigation strategies like optimal floorplanning and standard cell selection.
• Work with internal groups and external software vendors to establish priorities and define critical capabilities for key EMIR tools on projects.
• Own team growth by creating customized development plans, managing staffing initiatives, and fostering a collaborative environment to maximize every member's overall impact and productivity.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 10 years of technical experience in physical design disciplines involving power delivery and advanced process technology nodes.
• 3 years of experience in people management, developing employees.
  
• Experience with power grid integrity (EMIR) from initial budgeting to analysis, verification, and final signoff.
• Experience using standard EMIR tools like RedHawk, Totem, and Voltus, establishing EMIR budgets, defining signoff methodologies, and bringing up flows for new projects.
• Experience with power grid design and related design trade-offs.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• Experience owning EMIR at the block or full-chip level, including proactive floorplanning and defining standard cell usage with physical design owners.
• Experience with power delivery voltage droop mitigation.
• Knowledge of semiconductor project life cycle and quality goals of all functions.
• Familiarity with low power design techniques (e.g., multi Vth/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling).

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 10 years of technical experience in physical design disciplines involving power delivery and advanced process technology nodes.
• 3 years of experience in people management, developing employees.
  
• Experience with power grid integrity (EMIR) from initial budgeting to analysis, verification, and final signoff.
• Experience using standard EMIR tools like RedHawk, Totem, and Voltus, establishing EMIR budgets, defining signoff methodologies, and bringing up flows for new projects.
• Experience with power grid design and related design trade-offs.