TPU Hardware Design Engineer, Cloud

• Define TPU microarchitecture and develop high-quality, performant, and power-efficient SystemVerilog RTL code for complex digital designs.
• Partner with Verification teams to develop test plans, debug RTL, and ensure functional correctness, alongside supporting post-silicon validation efforts.
• Collaborate closely with the Physical Design team to successfully meet stringent timing, area, power, and manufacturability requirements.
• Work seamlessly with internal Partner teams to support and drive critical design integration efforts across the ecosystem.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 4 years of experience in RTL design.
• Experience with digital design and microarchitecture design.
• Experience in design optimizing for performance, power, and area.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• 5 years of experience in RTL design.
• Experience with scripting languages (i.e., Python or Perl).
• Experience with Linting, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Logic Equivalence Check (LEC).
• Experience architecting RTL solutions and with ASIC synthesis flows.
• Cross-functional engagement with Design Verification (DV) and Physical Design (PD) teams.
  

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 4 years of experience in RTL design.
• Experience with digital design and microarchitecture design.
• Experience in design optimizing for performance, power, and area.