Hardware Engineer Jobs in Mountain View, USA

Looking for a hardware engineer job in Mountain View? Choose from 20 open roles at 5 employers. Explore real salary data and skills breakdown across remote, hybrid and on-site roles.

20 Open roles
5 Companies hiring
178K Average salary

Companies hiring Hardware engineers in Mountain View

What do Hardware engineers in Mountain View work on?

The bulk of these roles sit in silicon design verification and chip architecture. A Senior Silicon Design Verification Engineer at Microsoft is expected to write C and C++ test content, develop low-level drivers and firmware, manage FPGA prototyping platforms, and run post-silicon bring-up and validation using SystemVerilog and hardware debug tools. At the architecture end, an AI Chip Architect at MatX works on defining compute architecture for AI accelerators, covering ISA design, memory systems, and performance tradeoffs across power, area, and latency. A middle layer of roles, represented by Google's AI/ML Accelerator Modeling Engineer, bridges hardware and software by building C-models for on-device ML accelerators and working across verification, firmware, and compiler teams.

Beyond these three summaries, sample titles point to additional specialisms: DFT engineering, ASIC physical design, embedded firmware for consumer devices such as Pixel, autonomous-vehicle hardware mechanical design, and simulation software management.

Skills and experience employers ask for

C++ and Python are the most frequently mentioned skills across these postings, each appearing in more than half. A Master's degree is mentioned in just over half and a PhD in a substantial minority, though mentions in a description do not confirm they are strict requirements. GPU knowledge appears in a handful of postings. Azure, LLMs, Agents, Transformers, and CI/CD each appear rarely. Given the small sample of twenty postings, these counts reflect this page only.

C\+\+ 65%
Master's degree 55%
Python 50%
Azure 25%
GPUs 25%
PhD 25%
LLMs 5%
Agents 5%
Transformers 5%
CI/CD 5%

Hardware Engineer roles that state a salary

The employers' own advertised ranges, for individual roles at different levels โ€” not an average and not a market rate.

Mountain View office, hybrid or remote?

Just over half of the postings on this page are listed as hybrid, with the remainder onsite. No postings are listed as fully remote, and none have an unknown work mode. Candidates should expect some in-person presence as a baseline, though the specific days or frequency of on-site attendance are not stated in these listings. Individual employers and teams may set their own hybrid schedules, and it would be worth confirming exact arrangements directly with each employer before applying.

Make your application specific to the work

  1. Review the role scope Hardware engineering here spans verification, architecture, firmware, and physical design, which are meaningfully different disciplines. Check the sample titles and summaries to confirm the specialism matches your background before reading further.
  2. Check stated qualifications carefully Where degree level and years of experience are stated, they vary by role and employer. The Microsoft verification postings, for example, specify a bachelor's degree plus a defined number of years of experience, so read each job description in full.
  3. Note pay transparency gaps Advertised salary ranges appear in only a minority of these postings and only from one employer. For roles without stated pay, compensation details are not stated here and would need to be confirmed with the employer directly.
  4. Prepare role-specific evidence Given how frequently C++, Python, SystemVerilog, and hardware debug skills appear in descriptions, be ready to point to concrete examples of these in your application materials, tailored to the specific specialism of each role.

Questions about Hardware Engineer jobs in Mountain View

No. Among the postings on this page, none are listed as fully remote. Postings are split between hybrid and onsite, so some level of in-person presence appears expected across all of them.

The employers represented in these postings are Google, MatX, Microsoft, Waymo, and Nuro. The distribution is uneven, with Google and MatX together accounting for the majority of listings.

A PhD is mentioned in the descriptions of a notable share of postings on this page, but mentions in a job description do not confirm it is a strict requirement. Each listing should be read individually to understand what is required versus preferred.

Only Microsoft has advertised pay ranges in these postings. Principal Design Verification Engineer roles show a range of 142,800 to 274,800 USD, while Senior Design Verification Engineer and Senior Silicon Design Verification Engineer roles show 119,800 to 234,700 USD. No other employers have stated pay in these listings.

A large share of postings do not carry a clear seniority label. Among those that do, lead-level roles make up the largest defined group, followed by senior, with a single manager-level posting. Entry-level postings are not evident in this set.

Jobs checked 3 hours ago. ยท Guide reviewed 14 September 2026.